Gowin¶
The torii.platform.vendor.gowin
module provides a base platform to support Gowin FPGAs with the Gowin and Apicula toolchains.
- class torii.platform.vendor.gowin.GowinPlatform(*, toolchain='Apicula') None ¶
Apicula toolchain
- Required tools:
yosys
nextpnr-gowin
ornextpnr-himbaechel
(newer)gowin_pack
The environment is populated by running the script specified in the environment variable
TORII_ENV_APICULA
, if present.- Available overrides:
gowin_pack_opts
: sets additional options forgowin_pack
commandnextpnr_opts
: sets additional options for nextpnr commandread_verilog_opts
: sets additional options forread_verilog
script_after_read
: inserts commands afterread_rtlil
in Yosys scriptscript_after_synth
: inserts commands aftersynth_gowin
in Yosys scriptsynth_opts
: sets additional options forsynth_gowin
in Yosys scriptyosys_opts
: sets additional options foryosys
command
- Build products:
{{name}}.cst
: physical constraints{{name}}.debug.v
: debug verilog file, ifTORII_DEBUG_VERILOG
is set{{name}}.il
: Register-Transfer-Level-Intermediate-Language file{{name}}.pnr.json
: place-and-route json{{name}}.rpt
: synthesis report (yosys log){{name}}.syn.json
: synthesis json{{name}}.tim
: timing data (nextpnr log){{name}}.fs
: binary bitstream
Gowin toolchain
- Required tools:
gw_sh
The environment is populated by running the script specified in the environment variable
TORII_ENV_GOWIN
, if present.- Available overrides:
add_constraints
: stuffadd_options
: stuff
- Build products:
{{name}}.cst
: physical constraints{{name}}.sdc
: timing constraints{{top}}.tcl
: TCL instructions forgw_sh
{{top}}.v
: verilog fileimpl/gwsynthesis/project*
:gw_sh
-generated outputs for synthesisimpl/pnr/project*
:gw_sh
-generated outputs for place-and-route{{name}}.fs
: binary bitstream