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Introduction
Installation
Getting Started
Tutorials
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- Including External non-Torii Modules
Language Guide
API Reference
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- Torii Backends
- Torii HDL Reference
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  - Abstract Syntax Tree
  - Clock Domain
  - DSL
  - IR
  - Memory
  - Records
  - XFRM
- Torii Utility Library
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Standard Library
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- Busses
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  - Wishbone Bus
- Encoding and Decoding
- Memory
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  - Memory Map
- Clock Domain Crossing
- First-in First-out Queues
- System on Chip
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  - Events
  - Peripherals
  - CSRs
- Industry Standard I/O
- Stream Library
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  - Simple Streams
- FPGA Vendor Modules
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  - Lattice FPGA Modules
  - Xilinx FPGA Modules
Platform Integration
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- Torii FPGA Platforms
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Testing and Verification
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- Simulation
- Formal Verification
External Libraries
Torii v0.X to v1.0 Migration Guide
Projects Using Torii
Torii Boards

Development

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Formal Verification¶

Todo

document this

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